Last December, Tencent announced its accession to the Open Source Instruction Set Standard RISC-V International Foundation. This is the second time that the RISC-V camp has welcomed new Chinese members, following companies and institutions such as Alibaba, Huawei, Ziguang Zhanrui, ZTE Communications, and the Chinese Academy of Sciences.
In the past January, Lars Bergstrom, Google’s Android Engineering Director, also expressed at the RISC-V Summit that he hopes RISC-V will become a first-class platform for Android, which is equivalent to the significance of ARM to Android. Google’s support is also an important milestone for the RSIC-V camp.
It seems that RISC-V is now highly anticipated. Fortunately, China’s industry has already achieved preliminary development.
01
China’s RISC-V Industry Has Initial Advantages
According to data from the RISC-V International Foundation, 13 of the top 25 RISC-V international members, including Tencent, come from China. In terms of RISC-V’s shipment volume, China also has a leading advantage. As of July 2022, the shipment volume of RISC-V architecture chips has exceeded 10 billion. The Xuantie series developed by Alibaba Pingtouge is widely recognized in the IoT chip market, with shipments exceeding 3 billion. The Chinese chip industry has shipped 5 billion RISC-V chips, accounting for half of the 10 billion yuan market.
Processor chips are a soft spot in China’s semiconductor industry and a “bottleneck” problem it faces. RISC-V benefits from its advantages of instruction simplification, modularity, scalability, and open source, bringing many benefits to the Chinese processor industry.
02
RISC-V is an opportunity for Chinese processors
In 2018, the United States Department of Commerce banned the sale of parts and commodities to ZTE, resulting in the latter’s chip shortage; In 2019, after the United States imposed chip sanctions on Huawei, the fluctuations in the chip supply chain intensified… On the basis of numerous unstable factors, the open instruction set standard RISC-V became an important choice for countries pursuing autonomy and controllability.
Through the RISC-V architecture, foreign monopolies can be overcome. X86 and ARM, as the two major architectures of processor chips, have accumulated a thick patent wall after decades of development. It is difficult for new companies to avoid massive patent blockages when designing X86 chips. But RISC-V is brand new and open source. On the one hand, there is no need to worry that ISA is in the hands of one company so that it can regain its advantages over other companies at any time by updating the ISA version or other means; On the other hand, China’s starting time on RISC-V is almost the same as that of foreign countries, so it has enough time to accumulate its own Patent pool, launch domestic private IP and chips, and hopefully help Chinese manufacturers quickly design customized processor cores containing independent intellectual property rights.
RISC-V can drive innovation and differentiation of Chinese processors. The Chinese semiconductor industry lacks a core processor instruction set. Although the processor IP core provided by ARM can meet the general application needs, its technology and business model make customization based on ARM IP very difficult. It neither meets the trend of customization of heterogeneous computing, nor can it bring great help to China’s self-developed customized processors. The modular and scalable advantages of RISC-V can greatly compensate for this weakness.
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Achievements of RISC-V in China
At present, Chinese chip manufacturers have fully developed various chips based on RISC-V architecture, including those for low-power AlOT, high-performance computing, AI, servers, CPUs, and so on.
For example, Alibaba’s RISC-V chips have formed three major series: C, E, and R, which can be applied in fields such as AI, high-performance computing, and low-power applications, such as the Tuoying 1520 chip and the Xuantie C908; In terms of ecology, Alibaba’s RISC-V chip has been deeply compatible with international mainstream and domestic operating systems such as RTOS, Yocto Linux, Android, and Dragon Lizard, and can be used for mobile phones, computers, servers, etc.
The Institute of Computing Technology of the Chinese Academy of Sciences took the lead in launching the “Xiangshan” high-performance open source RISC-V processor project in 2019. In June 2020, the first version of the Yanqi Lake architecture of Xiangshan processor was officially released; The second version of the South Lake architecture was released in March 2022, with plans to be released in the first quarter of 2023; At present, the third version of the Kunming Lake architecture is also being promoted.
However, the Long March of RISC-V in China has just begun. The open source RISC-V architecture is becoming a new direction for many large manufacturers to make efforts.
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More European and American companies turning to RISC-V
Currently, American companies such as Qualcomm, Google, and Intel are senior members of the RISC-V Foundation, and major companies such as Apple and AMD are making progress in the RISC-V field. Europe has also begun its layout.
Intel’s PlanB
As the leader of the X86, Intel has also taken frequent actions in the RISC-V field. Firstly, it participated in the C-round financing of SiFive and personally collaborated with SiFive to develop RISC-V architecture chips. Later, it joined the RISC-V International Foundation and launched a $1 billion fund to establish a foundry innovation ecosystem. In the middle of last year, Intel and Barcelona Supercomputing Center jointly invested 400 million euros to build a laboratory for RISC-V processors. Many people speculate that Intel’s vigorous development of RISC-V may be due to its intention to use it as a PlanB, create new products, and enhance the innovation of its own products.
Apple and AMD have entered the game
Apple and AMD released recruitment notices for RISC-V high-performance programmers and architects for embedded RISC-V CPUs in 2021 and 2022, respectively. Among them, Apple’s RISC-V recruitment requirements describe that RISC-V is developed to support necessary calculations in machine learning, visual algorithms, signal and video processing, etc. Apple’s RISC-V is likely to be used in smart wearable devices such as watches in the future. AMD is also seeking experts with experience in high-performance GPUs and requires relevant experience in RISC-V RV64 CPUs, CPU shuffle execution, speculative execution, and branch predictors. Industry insiders speculate that AMD may also be developing a new microcontroller.
Qualcomm: Strongly Embrace RISC-V
At last week’s Global RISC-V Summit, Manju Varma, Qualcomm’s Director of Product Management, revealed that Qualcomm had already applied RISC-V to its Snapdragon 865 SoC microcontroller in 2019, and has shipped 650 million RISC-V cores so far. Originally a staunch supporter of ARM architecture, Qualcomm has been using ARM architecture. With the outbreak of the patent war between Qualcomm and ARM, it seems that Qualcomm is accelerating its layout in the RISC-V field.
Europe also wants to reduce its dependence on X86 and ARM. The European Union recently announced an investment of 270 million euros to fund a high-performance computer project aimed at building RISC-V software and hardware.
In addition, Google, which just announced its support for RISC-V, is enough to prove the enormous development value of RISC-V.
05
How should China develop RISC-V in the future?
RISC-V is good at two aspects. One is the Internet of Things market with higher requirements for fragmentation, low cost, low power consumption and differentiation, and the other is the AI field with high demand for heterogeneous computing. China happens to have the largest markets in these two fields, but in future development, China still needs to focus more.
Collaborative development of software and hardware
RISC-V will move towards open application scenarios, and establishing a mature software ecosystem will be the biggest challenge for RISC-V to implement in open application scenarios. However, the RISC-V software ecosystem is immature, has poor compatibility, and is difficult to develop. Currently, most of the mass-produced chips are used in relatively closed application scenarios, with relatively simple and fixed software requirements. The original chip factory can achieve 70% of the software. In open application scenarios, software requirements will grow exponentially, such as the transplantation of various operating systems, optimization of middleware and library functions, and adaptation of various development frameworks. Each technical point is a huge project that must be fully invested in in cooperation with chip manufacturers, third-party software companies, and the open source community.
Finding clear market entry points
To achieve a reliable and high-quality commercial solution for RISC-V, on the one hand, it is necessary to continuously improve the standard specifications of the RISC-V instruction set, and on the other hand, it is also necessary to find clear application scenarios and generate opportunities for technological iteration. In the fields of computer processors and mobile phone processors, the X86/ARM ecosystem is already quite mature, and RISC-V’s desire to compete for market share is like “grabbing food from a tiger’s mouth”. In fields such as the Internet of Things, security chips, and intelligent wearables, the cornerstone of the Arm market is not solid, and there may be more opportunities for RISC-V.
Developing towards high-performance
The main application directions of the RISC-V processor currently under research are ultra-high performance computing and vector computing. After several years of development, RISC-V has become more mature in mid to low end applications, but there is still a gap compared to other architecture processors (mainly ARM) in high-performance computing and artificial intelligence applications. Because RISC-V instruction set is too simple and fragmentation, most of its application scenarios are embedded. In terms of high-performance processors, RISC-V chip products are mostly 32-bit. From a practical perspective, RISC-V will continue to evolve towards high-performance, while high-end “momentum” still needs to be honed for a long time.
Support from industry, education, and research
RISC-V has provided a breakthrough in core processor technology for China, and its development should be comprehensively promoted from various perspectives such as funding, policy, scientific research, and teaching. Increase support for educational research institutions, support RISC-V based university education and research, including software, hardware, and application development, provide fresh blood for industrial development, carry out extensive ecological layout, and promote software adaptation in RISC-V, including RISC-V basic software, operating system, middleware, and application software.
RISC-V has been widely welcomed in China due to its open source nature. At almost the same time, a large number of Chinese chip companies increased their investment in RISC-V. However, the current development status of RISC-V is that there are many people who are optimistic about this technology, but there is relatively little real work done, and more support needs to be provided to the industry.
06
epilogue
With the emergence of stable hardware, the RISC-V architecture software and hardware full stack has become an inevitable trend, which will be comprehensively optimized from IP to SoC, to development boards, SOMs, operating systems, and application software. The RISC-V architecture will move towards broader ecological cooperation, with more new models in business, software enrichment, and application diversification.
As the best place for the landing and development of RISC-V, China has abundant application scenarios to fully leverage the diversity of RISC-V. At the same time, the Chinese industry is also forming a broad RISC-V ecosystem covering chip design, design tools, basic software, chip applications, and talent training. However, this is only the beginning, and the long march of RISC-V in the future is still long and requires more efforts.https://www.stoneitech.com/